Programmable integrated circuit devices such as field programmable gate array (FPGA) and complex programmable logic device (CPLD) devices may be loaded or configured with a user design to perform any of a variety of functions. Generally, electronic design automation (EDA) tools are used by circuit designers or design engineers to create circuit designs (commonly referred to as user designs) for integrated circuit devices.
When designing a circuit, a circuit designer or design engineer may debug their design using the EDA tool. As an example, the EDA tool may automatically insert debug circuitry into a user design. When the user design is compiled together with the inserted debug circuitry, the user may perform debugging operations on the design via a Joint Test Action Group (JTAG) port available on the integrated circuit device.
Apart from using the JTAG port, the integrated circuit may be debugged via other interfaces such as the Peripheral Component Interconnect Express (PCIe) interface standard. However, the user or circuit designer may need to include specific debug traffic circuitry, such as multiplexing and demultiplexing circuits, to allow the PCIe interface to be used for debugging purposes.
Additionally, the user may need to set aside addresses within the PCIe device's address space to be used for its debug logic. This may involve adding an additional Base Address Register (BAR) to the user's PCIe function or expanding the size of one of the user's existing BARs. As such, although the PCIe interface may allow relatively faster debugging access compared to the typical JTAG interface, substantial modifications to a user design may be needed in order for the PCIe interface to be used for debugging a user design.